Search - pwm verilog

[Other resource] PWM

Description: 自己写的一个pwm模块，verilog的，是用于无刷电机控制的。
Platform: | Size: 2848 | Author: 李凯 | Hits:

[Other resource] PWM

Description: Core_PWM,verilog语言编写，可用于电机驱动
Platform: | Size: 5007405 | Author: zhan | Hits:

[Other resource] PWM

Description: Core_PWM,verilog语言编写，可用于电机驱动
Platform: | Size: 2441 | Author: zhan | Hits:

[Other resource] cpld-pwm

Description: 基于cpld的pwm控制设计采用vhdl.verilog语言设计对大家比较有用
Platform: | Size: 79764 | Author: emily | Hits:

[VHDL-FPGA-Verilog] verilog hdl教程135例

Description: 浅显易懂的vrilogHDL的程序，可以帮助你迅速上手-Easy and simple VerilogHDL programs to help you to get to the language quickly.
Platform: | Size: 158720 | Author: 陈浩东 | Hits:

[VHDL-FPGA-Verilog] CorePWM_RTL_Verilog

Description: Verilog_HDL源码 -Verilog_HDL source Verilog_HD L FOSS Verilog_HDL FO
Platform: | Size: 2048 | Author: | Hits:

[VHDL-FPGA-Verilog] CPLD_Design_50

Description: CPLD实用设计50例，非常经典的CPLD设计，包含50个实际的典型应用，涉及直流电机PWM驱动，编码等内容，有了这50例，举一反三，就会了很多应用-50 cases of practical CPLD design, very classic CPLD design, including 50 typical practical applications, involving PWM DC motor driver, coding, etc., with these 50 cases, giving top priority will be a lot of applications
Platform: | Size: 7625728 | Author: 刘工 | Hits:

[VHDL-FPGA-Verilog] FPGAdezizhixingSPWMboChengXu

Description: 基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
Platform: | Size: 4096 | Author: 小喻 | Hits:

[ActiveX/DCOM/ATL] avalon_pwm_module_v2.51_completed

Description: 数字PWM的verilog描述，适合于数字控制的DC-DC-Digital PWM s Verilog description, suitable for digital control of DC-DC
Platform: | Size: 1024 | Author: icseubear | Hits:

[Other] PWM_ise9migration

Description: verilog 语言去产生可以调节占空比的pwm波形去控制信号管的开通和关断
Platform: | Size: 233472 | Author: 胡汗 | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL

Description: FPGA采用模块工程文件QUARTUS II工程、ADC0809、电机控制PWM、LCD12864显示控制、UART_VHDL-FPGA module QUARTUS II project engineering documents, ADC0809, motor control PWM, LCD12864 display control, UART_VHDL
Platform: | Size: 238592 | Author: wangzhaohui | Hits:

[VHDL-FPGA-Verilog] transfer

Description: 基于CPLD的PWM波形的发生器，编程语言为verilog,开发环境为QuartusII.-The CPLD-based PWM waveform generator, the programming language to verilog, development environment for QuartusII.
Platform: | Size: 2048 | Author: ouyangyajuan | Hits:

[VHDL-FPGA-Verilog] EDA

Description: verilog 练习的基本程序流水灯，PWM ，按键消抖，等基本程序，经过一一验证-practice the basic procedures verilog water lights, PWM, key debounce, and other basic procedures, after only verify
Platform: | Size: 18572288 | Author: 谷向前 | Hits:

[VHDL-FPGA-Verilog] pwm

Description: 利用verilog来实现PWM信号的产生-PWM verilog
Platform: | Size: 1024 | Author: meihanfei | Hits:

[VHDL-FPGA-Verilog] PWM

Description: 通过设置时钟实现脉冲宽度调制的verilog代码及测试(By setting the clock to achieve pulse width modulation of the Verilog code and test)
Platform: | Size: 155648 | Author: 老虎szjwl | Hits:

[VHDL-FPGA-Verilog] 测pwm波占空比

Description: 基于Verilog的接受pwm波并且测量pwm波占空比(Measuring the duty cycle of PWM wave)
Platform: | Size: 1024 | Author: 友善的凌晨 | Hits:

[VHDL-FPGA-Verilog] pwm with tb final

Description: pwm with testbench in verilog ,synthesizable
Platform: | Size: 189440 | Author: addy007 | Hits:

[VHDL-FPGA-Verilog] PWM

Description: 利用Verilog语言设计一个PWM控制器，实现：控制器输入时钟1MHz；控制器输出脉冲周期1kHz，脉宽最小调节步长0.1%。(The Verilog language is used to design a PWM controller, which is realized: the controller input clock 1MHz; the controller output pulse cycle 1kHz, and the pulse width minimum adjustment step 0.1%.)
Platform: | Size: 62464 | Author: jcg17 | Hits:

[SCM] pwm控制直流电机_verilog_l9110

Description: VERILOG语言控制的直流电机在各大数字逻辑软件如VIVADO ise 均可使用功能强大简单易学(motor controlled by VERILOG HDL)
Platform: | Size: 10240 | Author: 铭润 | Hits:

[VHDL-FPGA-Verilog] pwm

Description: 本程序可以实现输出不同占空比（0-100）和不同频率的pwm波形；满足驱动不同硬件的需求；(This program can output PWM waveforms with different duty cycles (0-100) and different frequencies, and meet the needs of different hardware drivers.)
Platform: | Size: 7469056 | Author: DA北岛 | Hits:

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[Other resource] PWM

[Other resource] PWM

[Other resource] PWM

[Other resource] cpld-pwm

[VHDL-FPGA-Verilog] verilog hdl教程135例

[VHDL-FPGA-Verilog] CorePWM_RTL_Verilog

[VHDL-FPGA-Verilog] CPLD_Design_50

[VHDL-FPGA-Verilog] FPGAdezizhixingSPWMboChengXu

[ActiveX/DCOM/ATL] avalon_pwm_module_v2.51_completed

[Other] PWM_ise9migration

[VHDL-FPGA-Verilog] URAT_VHDL

[VHDL-FPGA-Verilog] transfer

[VHDL-FPGA-Verilog] EDA

[VHDL-FPGA-Verilog] pwm

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] 测pwm波占空比

[VHDL-FPGA-Verilog] pwm with tb final

[VHDL-FPGA-Verilog] PWM

[SCM] pwm控制直流电机_verilog_l9110

[VHDL-FPGA-Verilog] pwm

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